Education
Georgia Institute of Technology
Ph.D. in Electrical and Computer Engineering
(with a minor in Computer Science)
Aug 2018 - Present
M.S. in Electrical and Computer Engineering
Aug 2018 - Dec 2020
Fudan University
B.E. in Microelectronic Science and Engineering
Sep 2014 - Jul 2018
National University of Singapore
Exchange Student
Aug 2016 - Dec 2016
Reasearch Experiences
GTCAD Laboratory | Georgia Institute of Technology | Research Assistant | Advisor: Prof. Sung Kyu Lim
Project: Power Delivery and Thermal Solutions for Micro-Bumping and Hybrid-Bonding 3D ICs
Jun 2021 – Present
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Developed a rapid thermal and power delivery analysis flow for multi-tier 3D ICs, and evaluated the trade-off between design PPA and thermal/power-delivery constraints; the results are published in ISLPED 2021 and ISLPED 2022.
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Proposed EDA solutions to address the power delivery and thermal issues based on macro partitioning and buried PDN.
Project: Heterogeneous 3D Integration with STT-MRAM
Aug 2019 – May 2021
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Implemented the caches for a RISC-V-based system with STT-MRAM, built heterogeneous 3D designs with non-volatile memory, and improved the system performance with a reduced footprint area; the results are published in CAL.
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Developed a thermal and power delivery-aware 3D physical design flow for monolithic 3D ICs, and modeled commercial-level high-performance heterogeneous 3D ICs using Arm Cortex-A processors; the results are published in TVLSI.
Project: Thermal-aware Tier Partitioning and Extraction for Wafer-bonded 3D ICs
Aug 2018 – Sep 2019
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Developed a parasitic extraction toolchain based on Mentor Calibre and Synopsys PrimeTime for Wafer-on-Wafer bonded 3D ICs, which can extract the inter-die electrical coupling and analyze the impacts on signal integrity.
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Proposed a new methodology to implement memory-on-logic 3D ICs, and improved the performance of a RISC-V core (OpenPiton); the results are published in IEEE Micro and DATE 2020.
State Key Laboratory of ASIC and Systems | Fudan University | Research Assistant | Advisor: Prof. Jinmei Lai
Project: FPGA Design and Applications Based on a Remote Configuration Platform
Jan 2016 – Jul 2018
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Implemented a high-speed serial data transmission system with error correction code using Xilinx Zynq 7000 SoCs.
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Developed a waveform generator based on an ADI D/A convertor and Xilinx MicroBlaze soft processor core.
Teaching Experiences
Graduate Teaching Assistant | Georgia Institute of Technology
May 2021- Aug 2021
Graduate Class (ECE 6133): Physical Design Automation of VLSI Systems (Sp. 2022).
Work Experiences
Design Automation Engineer Intern | Intel Corp. | Hillsboro, Oregon (Remote) May 2022- Aug 2022
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Implemented an open-source RISC-V-based multi-core CPU benchmark design with Intel technology and memory IPs.
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Developed a pattern-based on-chip power grid design and analysis flow with fully parameterized PDN configurations.
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Proposed a machine-learning-based power grid design and optimization method to improve power integrity in 2D ICs.
Physical Design CAD Intern | Apple Inc. | Santa Clara, California (Remote) May 2021- Aug 2021
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Developed CAD solutions for timing and power analysis and data mining in advanced tech nodes.
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Analyzed and compared timing and power bottlenecks of CPU and other IPs in different tech nodes using statistical models.
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Proposed and evaluated potential approaches to further optimize timing and dynamic power at the post-routing stage.
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Research Intern | Arm Research | Austin, Texas Jan 2020 – Jul 2020
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Analyzed and improved the physical implementation quality of CPU designs with a novel micro-architecture.
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Developed a fast power delivery and thermal analysis approach for large-scale prototyping computing platforms.
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Created a statistical model of the power delivery network and package substrate for next-generation CPU designs.
Skills
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Programming: proficient in C/C++, Python, TCL, and Verilog HDL, competent in MATLAB
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EDA: Synopsys Design Compiler, Cadence Innovus, Quantus, Voltus, Mentor Graphics Calibre, ModelSim, Ansys RedHawk
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Hardware: MIPS32, Xilinx Zynq 7000 SoCs, Arm Cortex-M3, Cortex-A7, Cortex-A53
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Experimental Skills: VLSI logical/physical design, implementation, and analysis; building and troubleshooting circuits
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Languages: English (fluent), Chinese (native)
Selected Coursework
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Physical Design Automation of VLSI Systems
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Digital Systems Test
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Advanced Programming Techniques
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Graph Algorithms
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Statistical Machine Learning
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Advanced Computer Architecture
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Graphical Models in Machine Learning